IC Validator Customer Experiences
IC Validator Customer Experiences
Rockley Photonics Silicon Photonics Verification with IC Validator
1:07
Learn about Rockley’ experience about using IC Validator physical signoff on Photonics IC designs. IC Validator helped to reduce physical verification cycle from weeks to days for the photonics applications.
Barefoot Network’s Experience with IC Validator Physical Signoff on AWS Cloud
0:39
Learn about Barefoot Networks’ experience about using IC Validator physical signoff on Amazon Web Services Cloud. IC Validator scaling on the cloud delivers full chip DRC signoff within a day and 2-day runtime savings.
Toshiba Highlights IC Validator Productivity Benefits: Overnight Full Chip Signoff, Faster DRC Closure
1:09
Learn about Toshiba’s experience using IC Validator physical signoff on ADAS chips. Toshiba achieves overnight full chip signoff and accelerates physical verification closure to less than a week.
Rockley Photonics Silicon Photonics Verification with IC Validator
Learn about Rockley’ experience about using IC Validator physical signoff on Photonics IC designs. IC Validator helped to reduce physical verification cycle from weeks to days for the photonics applications.
1:07
Barefoot Network’s Experience with IC Validator Physical Signoff on AWS Cloud
Learn about Barefoot Networks’ experience about using IC Validator physical signoff on Amazon Web Services Cloud. IC Validator scaling on the cloud delivers full chip DRC signoff within a day and 2-day runtime savings.
0:39
Toshiba Highlights IC Validator Productivity Benefits: Overnight Full Chip Signoff, Faster DRC Closure
Learn about Toshiba’s experience using IC Validator physical signoff on ADAS chips. Toshiba achieves overnight full chip signoff and accelerates physical verification closure to less than a week.
1:09
IC Validator Latest Videos
IC Validator Latest Videos
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ICV PERC VUE Introduction - Topology Results
Overview of debugging a Topology based run with ICV PERC.
2:59
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IC Validator PERC VUE Demo – Part 3
Overview of debugging a Topology based run with ICV PERC.
2:30
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IC Validator PERC VUE Demo -Part 4
Overview of debugging a Current Density run using ICV PERC VUE.
6:08
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IC Validator PERC VUE Demo – Part 1
In part 1-7 part series, we describe port & switch setup using the esd_setup.rs file & demonstrate how to setup a Synopsys IC Validator PERC run using the example script found in the Synopsys IC Validator installment directory.
4:16
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IC Validator PERC VUE Demo - Part 5
Overview of debugging a Point-to-Point Resistance run using ICV PERC VUE.
6:31
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IC Validator Dynamic Resource Allocation For Efficient Compute Resource Usage
The IC Validator elastic CPU feature dynamically allocates resources during an IC Validator run. The host_elastic command automatically manages resources by adding/removing hosts as per run requirement and optimizes compute resource CPU utilization.
3:13
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03- How to run IC Validator LIVE DRC Tool using IC Compiler II GUI
IC Validator Live DRC is an interactive DRC engine to get immediate DRC feedback while doing physical implementation. In this video learn how to use Live DRC in IC Compiler II and Fusion Compiler to run DRC on-the-fly and debug DRC results quickly.
4:32
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Interactive DRC Checking in Custom Compiler using IC Validator Live DRC
IC Validator Live DRC is an interactive DRC engine to get immediate DRC feedback while doing layout design. In this video learn how to use Live DRC in custom compiler to run DRC on-the-fly in custom compiler and debug DRC results quickly.
4:08
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IC Validator PERC - Comprehensive Reliability Verification
IC Validator PERC is a comprehensive robust solution for verification of reliability and ESD of modern designs. IC Validator PERC enables designers to do a broad set of complex reliability verification checks at cell, block and full chip level.
3:11
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IC Validator Workbench: Overview
Learn about IC Validator Workbench, a high performance hierarchical layout viewing and analysis tool. It is a companion layout analysis toll for IC Validator physical verification solution.
3:25
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IC Validator Fusion Demo: Explorer DRC and Heatmap in Fusion Compiler / IC Compiler II
Learn how to isolate key design weaknesses in early design planning and P&R stages using Explorer DRC. DRC Violation heat map to highlight a sampling of DRC across the design
2:47
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IC Validator DRC in the Cloud: Demo
Learn how to use IC Validator on the cloud to run DRC checking, scaling for faster performance, and elastic CPU management to add and remove CPUs on the fly.
9:25
