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At the IC Validator panel at SNUG Silicon Valley 2018, IBM shares their experience with IC Validator. DRC explorer is an innovative technology for full chip physical signoff. In this video, IBM explains how DRC explorer delivered fastest path to preliminary DRC results on full chip designs.
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Learn about Toshiba’s experience using IC Validator physical signoff on ADAS chips. Toshiba achieves overnight full chip signoff and accelerates physical verification closure to less than a week.
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Learn about Rockley’ experience about using IC Validator physical signoff on Photonics IC designs. IC Validator helped to reduce physical verification cycle from weeks to days for the photonics applications.
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Learn about Barefoot Networks’ experience about using IC Validator physical signoff on Amazon Web Services Cloud. IC Validator scaling on the cloud delivers full chip DRC signoff within a day and 2-day runtime savings.
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